Gen AI assisting Mapping of SHA-256 Algorithm on Silicon [Video]

For years, digital system design and verification have steadily evolved, with the abstraction level pushed higher and higher. But now, generative AI, large language models (LLMs), and agentic approaches are setting entirely new standards—enabling complex digital designs to be realized and verified with minimal manual coding effort. By thoughtfully architecting designs with systematic planning and phased execution, we’re able to streamline intricate digital projects like never before.
In my course, Generative AI for Algorithm-to-Silicon Mapping, we’re diving into groundbreaking experiments with Gen AI. In this session, I generate RTL Verilog code for the SHA-256 algorithm, showcasing how today’s Gen AI tools can produce high-quality RTL code along with test stimulus, almost autonomously! As we explore these AI-driven approaches together, we uncover how Gen AI might optimize circuits within the complex space of digital design.
Join me on this journey to see the potential of generative AI in transforming chip design—watch the code generation in action with Gen AI tools.